A MediaTek team has received the ISSCC 2025 Anantha P.Chandrakasan Distinguished Technical Paper Award for its paper presenting a 212.5Gb/s DSP-based PAM4 transceiver fabricated using TSMC 4nm FinFET technology.
ISSCC is the flagship conference of the IEEE Solid-State Circuits Society and represents the global pinnacle for advancements in solid-state circuits and system-on-chip. It remains the primary platform for technical exchange in the semiconductor field. ISSCC's technical scope includes communication systems, analog systems, digital systems, and innovative technologies such as micro-mechanics, MEMS, imaging devices, sensors, and biomedical equipment.
This marks the third time MediaTek has received this prestigious award, following previous wins in 2024 and 2021. At the same time, MediaTek is also celebrating its 23rd consecutive year of papers accepted by ISSCC.
The paper demonstrates a high-speed transceiver capable of operating at data rates above 200Gb/s while maintaining performance even under the highest recorded channel loss to date. This capability provides a significant advantage in Data Center design by improving data reliability and performance across longer transmission distances. The breakthrough highlights MediaTek’s industry leadership in advanced interconnects and strengthens its technology portfolio to deliver enhanced solutions for cloud AI customers.
Paper Abstract
MediaTek presents a 212.5Gb/s DSP-based PAM4 transceiver fabricated in TSMC 4nm FinFET technology. The design features a DAC-based transmitter and an ADC-based receiver with powerful DSP for channel equalization. A per-lane PLL architecture enables flexible clocking with dedicated PLLs in each transmitter and receiver lane. The SerDes supports a wide range of channel conditions and achieves a 2.5e-6 BER over a channel with loss exceeding 50dB. This innovative IP reinforces MediaTek’s leadership in interconnect solutions and expands its technology offerings to meet the evolving requirements of cloud AI customers.
